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+- interrupts: Interrupt mapping for GPU IRQ. +- compatible: Must be "qcom,kgsl-3d0" and "qcom,kgsl-3d" +- reg: Specifies the base address and address size for this device. +++ -0,0 +1,159 GPU + +Qualcomm Adreno GPU + +Required properties: +- label: A string used as a descriptive name for the device. + + +A number of frequency levels are represented as sub-nodes: + +required properties: +- reg: The index of the frequency entry +- qcom,freq The frequency of the DVS entry (in kHZ) +- qcom,idle-energy: The idle energy cost of the entry (in micro watts) +- qcom,active-energy: The active energy cost of the entry (in micro watts) + +Sample: + + diff -git a/Documentation/devicetree/bindings/gpu/adreno.txt b/Documentation/devicetree/bindings/gpu/adreno.txt +- qcom,algo-ss-iobusy-conv: Used to convert correlation time into assumed IO Busy time, which is removed + from measured elapsed time when computing cpu utilization. +- qcom,algo-ee-max-util-pct: When determining the level with the lowest energy, any level that exceeds this busy + percentage, for the measured work in the last window, is disqualified for performance reasons. +- qcom,algo-ss-util-pct: When determining the steady state level, this percentage value is used to provide headroom + from the utilized cpu to the selected level. +- qcom,algo-ss-window-size: Steady state window size in microseconds. +- qcom,algo-disable-pc-threshold: If core frequency (kHz) is higher than this value, power collapse is disallowed. +- qcom,algo-slack-time-us: Time in microseconds after which the QoS guarantee will kick in + and the clock rate will increased as necessary.
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+ Limited to this value if switching time takes longer than this limit. + +Required properties: + +- qcom,core-max-time-us: Maximum time limit in micorseconds for switching clock rate. +++ -0,0 +1,78 Core Info + +This data describes specific DCVS tuning data for a specific core (CPU, GPU, +etc). Merge "trace: Modify timer_start and irq_handler_entry trace events." into msm-3.4 diff -git a/Documentation/devicetree/bindings/arm/msm/dcvs-core-info.txt b/Documentation/devicetree/bindings/arm/msm/dcvs-core-info.txt